UVC BUS MASTER EXAMPLE (AN_434
) – Being UVC class the design is plug
and play from a USB perspective, with no additional drivers or coding required. From
an application perspective, the FT602 works well with a variety of FPGA bus masters. To assist developers in rapidly creating compatible FPGA firmware,
and its associated firmware downloads provide a working project as per the block diagram below to interface with the FT602 and may then be further incorporated into a larger FPGA project. The firmware project may support 1, 2, 3 or 4 video streams and compliments the 4 channel capability of the FT602 IC.
Projects supporting both Altera
may be downloaded.
- Supports both FT245 and FT600 (multi-channel) FIFO modes
- Supports 32-bits wide interfaces for interfacing to FT602 devices
- Supports QVGA, VGA, HD and Full HD resolutions in 16-bit YUV format
- Supports up to 4 UVC channels with the total bandwidth up to 320MB per second
- Supports I2C for sideband configuration
- Supports 100MHz and 66MHz FIFO clock operation
- Supports both Xilinx and Altera FPGAs