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Set TCK/SK Divisor
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0x86,
0xValueL,
0xValueH



This will set the clock divisor.

The TCK/SK always has a duty cycle of 50%, except between commands where it will remain in its initial state. The initial state is set using the 23. Set Data Bits Low Byte command. For example, to use it in JTAG mode you would issue:-

$80   Set Data Bits Low Byte
$08   TCK/SK, TDI/DU low, TMS/CS high
$0B   TCK/SK, TDI/DU, TMS/CS output, TDO/D1 and GPIOL1 -> 14 input


The clock will then start low. When the MPSSE is sent a command to clock bits (or bytes) it will make the clock go high and then back low again as 1 clock period. For TMS/CS commands, a $4B command would be used for no read, and a $6B command for TMS/CS with read. For clocking data out on TDI/DU with no read of TDO/D1, a $19 command would be used for bytes and $1B for bits. To read from TDO/D1 with no data sent on TDI/DU a $28 command would be used for bytes and $2A for bits. To scan in and out at the same time a $39 command would be used for bytes and $3B for bits.


The TCK/SK frequency can be worked out using the following algorithm :

TCK/SK period = 12MHz / (( 1 +[(0xValueH * 256) OR 0xValueL] ) * 2)


For example:

Value      TCK/SK Max
0x0000       6 MHz
0x0001      3 MHz
0x0002      2 MHz
0x0003      1.5 MHz
0x0004      1.2 MHz
............      ..............
0xFFFF      91.553 Hz