How do I prevent buffer overrun in 245 FIFO mode?
The 245 FIFO interface should only be written to when the TXE# pin is
logic 0.
The TXE# pin will go to logic 1 and back to logic 0 for every byte
latched in.
If the application on the PC never reads any data the buffer on the
PC (64kbytes) and the buffer on the chip will become full.
When these buffers are full the TXE# line should remain at logic 1
until the application on the PC does a read to free up some space.
Some users report TXE# goes back to logic 0 after a brief period
(actually matches latency timer).
This can result in data loss due to overrun.
To prevent this from happening the application on the PC should have
set flow control for RTS_CTS flow control.
Although the hardware does not have RTS/CTS pins the
driver does not know this, but it is now forced to monitor
certain status bits, which allows the TXE# pin to be kept at
logic 1 until space is made available.
How does FTDI handle USB suspend?
USB suspend is controlled by the USB host telling telling
the peripheral device to go to suspend.
The FTDI drivers do not force the FTxxx devices to go to suspend.
If the USB data bus is idle for >3ms the USB host should
put the FTxxx into suspend.
To prevent this happening you should ensure there is
always data within 3ms. This could be done by sending dummy
data.
The alternative sneaky fix is to set the latency timer to 2ms. This
forces the 2 status bytes to be returned every 2ms and hence creates
enough traffic to keep the device awake.
How does RTS/CTS flow control work in an FTDI
chip? FTxxx RTS# pin is an output. It should be
connected to the CTS# input pin of the device at the other
end of the UART link.
If RTS# is logic 0 it is indicating the FTxxx device can
accept more data on the RXD pin.
If RTS# is logic 1 it is indicating the FTxxx device
cannot accept more data.
RTS# changes state when the chip buffer reaches its last
32 bytes of space to allow time for the external device to
stop sending data to the FTxxx device.
FTxxx CTS# pin is an input. It should be connected to the
RTS# output pin of the device at the other end of the UART
link.
If CTS# is logic 0 it is indicating the external device
can accept more data, and the FTxxx will transmit on the TXD
pin.
If CTS# is logic 1 it is indicating the external device
cannot accept more data. the FTxxx will stop transmitting
within 0~3 characters, depending on what is in the buffer.
This potential 3 character overrun does occasionally
present problems. Customers shoud be made aware the FTxxx is
a USB device and not a "normal" RS232 device as seen on a
PC. As such the device operates on a packet basis as opposed
to a byte basis.
Word to the wise. Not only do RS232 level shifting
devices (e.g. MAX232) level shift, but they also invert the
signal.
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